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Urgent! Senior DFT Methodology Engineer Job Opening In Santa Clara – Now Hiring NVIDIA
NVIDIA has continuously reinvented itself over two decades.
Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing.
More recently, GPU deep learning ignited modern AI — the next era of computing.
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world.
This is our life’s work , to amplify human imagination and intelligence.
Make the choice to join us today.
DFX Methodology Group at NVIDIA works on groundbreaking innovations involving crafting creative solutions for cutting edge test techniques, in-system test architecture, as well as verification and post-silicon validation on some of the industry's most complex semiconductor chips.
What you'll be doing:
+ As a member in our team, you will work next generation test architectures.
You will work with multi-functional teams, implementing brand-new designs in test access mechanisms, high-speed test interfaces, and in-system test architecture.
+ In addition, you will help develop and deploy In-System Test (IST) methodologies for our next generation products for scan architecture, ATPG, MBIST, and IOBIST applications.
+ You will also help mentor junior engineers on test designs and trade-offs including cost and quality.
What we need to see:
+ BSEE (or equivalent experience) with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT, system architecture, or RTL design.
+ Understanding of fundamental DFT topics, such as, fault modeling, ATPG and fault simulation.
Tessent ATPG/SSN experience is a plus.
+ Experience in Silicon debug and bring-up on the ATE or SLT platforms, post silicon validation and characterization.
+ Excellent understanding of MBIST and IOBIST fundamentals.
+ Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based designs, and UCIe protocol.
+ Good understanding of RTL coding principles.
+ Knowledge of high-speed interface architectures such as PCIe, USB3, DDR is a plus.
+ Excellent analytical skills in verification and validation of logic on complex and multi-million gate designs using vendor tools.
+ Good exposure to multi-functional areas including RTL & clocks design, STA, place-n-route and power.
+ Strong programming and scripting skills in Perl, Python or Tcl desired.
+ Outstanding written and oral communication skills with the curiosity to work on rare challenges.
NVIDIA offers highly competitive salaries and a comprehensive benefits package.
We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast.
If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.
You will also be eligible for equity and benefits (https://www.nvidia.com/en-us/benefits/) .
Applications for this job will be accepted at least until October 21, 2025.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.
As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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Unlock Your Senior DFT Potential: Insight & Career Growth Guide
Real-time Senior DFT Jobs Trends in Santa Clara, United States (Graphical Representation)
Explore profound insights with Expertini's real-time, in-depth analysis, showcased through the graph below. This graph displays the job market trends for Senior DFT in Santa Clara, United States using a bar chart to represent the number of jobs available and a trend line to illustrate the trend over time. Specifically, the graph shows 184602 jobs in United States and 2174 jobs in Santa Clara. This comprehensive analysis highlights market share and opportunities for professionals in Senior DFT roles. These dynamic trends provide a better understanding of the job market landscape in these regions.
Great news! NVIDIA is currently hiring and seeking a Senior DFT Methodology Engineer to join their team. Feel free to download the job details.
Wait no longer! Are you also interested in exploring similar jobs? Search now: Senior DFT Methodology Engineer Jobs Santa Clara.
An organization's rules and standards set how people should be treated in the office and how different situations should be handled. The work culture at NVIDIA adheres to the cultural norms as outlined by Expertini.
The fundamental ethical values are:The average salary range for a Senior DFT Methodology Engineer Jobs United States varies, but the pay scale is rated "Standard" in Santa Clara. Salary levels may vary depending on your industry, experience, and skills. It's essential to research and negotiate effectively. We advise reading the full job specification before proceeding with the application to understand the salary package.
Key qualifications for Senior DFT Methodology Engineer typically include Other General and a list of qualifications and expertise as mentioned in the job specification. Be sure to check the specific job listing for detailed requirements and qualifications.
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Before the Interview:To prepare for your Senior DFT Methodology Engineer interview at NVIDIA, research the company, understand the job requirements, and practice common interview questions.
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