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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus) Job Opening In San Diego – Now Hiring BAE Systems

Senior Principal Design Verification Engineer FPGA (Sign on Bonus)

    United States Jobs Expertini Expertini › United States › Jobs › San Diego › Other General › Senior Principal Design Verification Engineer Fpga (Sign On Bonus)

Job description

**Job Description**

Picture yourself developing advanced electronic systems deployed to protect members of our armed services on some of the nation's most sophisticated aircraft.

Pretty rewarding, right?

And now imagine doing that job while working in a fast-paced environment using state-of-the-art tools and methodologies, all the while increasing your knowledge, growing your skills, and advancing your career.

BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments.

Candidates will be given the opportunity to lead teams, mentor junior engineers, and contribute to the evolution of the company's verification processes and methodologies.

While in this job you will

+ Plan, architect, develop, and use configurable, self-checking testbenches implemented in SystemVerilog/UVM and/or VHDL;
+ Develop constrained-random, metric-driven test plans and strategies to verify FPGAs performing signal processing and control functions in Electronic Warfare systems;
+ Collect and analyze coverage metrics, then use that information to improve the effectiveness of testcases;
+ Enhance your leadership skills while leading small to medium sized DV teams
+ Create reusable Verification IP to be shared across the organization;
+ Drive changes to our process and methodologies.
+ Enhance your DV skills as well as your knowledge of Electronic Warfare while working with subject matter experts;
+ Mentor junior engineers across multiple U.S. locations

BAE Systems offers competitive pay, benefits, and important work-life balance initiatives including every other Friday Off, Flextime, and Telecommuting.

BAE also believes in a culture of recognition for the extraordinary contributions of our skilled employees.

Because of the need for consistent, in-person collaboration and/or the requirement to perform all work onsite due to the nature of this particular role, it will be performed full-time on site.
#ESFPGA
#IJS

**Required Education, Experience, & Skills**

+ Bachelor's Degree and 8 years work experience (or equivalent experience)
+ Current Security Clearance (Secret), or eligible to obtain one
+ Experience planning, architecting, developing, and using constrained random, self-checking testbenches in SystemVerilog/UVM, OVM, and/or VHDL
+ Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence)
+ Proven track record of managing and executing to schedules, and driving tasks to closure.

Candidates should also be comfortable multitasking because they may be asked to support multiple projects.
+ Strong communication and documentation skills
+ Experience developing and implementing test plans.
+ Abilty to work effectively in a multi-site or borderless environment

**Preferred Education, Experience, & Skills**
The following skills/experience are preferred, but not required:

+ Perl/Python
+ C /Java
+ Git/Jira/BitBucket
+ Digital Signal Processing
+ Matlab/Simulink
+ Working knowledge of VHDL
+ FPGA Design Experience
+ Experience creating reusable Verification IP.
+ Experience leading small to medium teams with accountability for cost, schedule, and quality
+ Experience driving process.
+ Demonstrated mentoring skills

**Pay Information**
Full-Time Salary Range: $130355 - $221603

Please note: This range is based on our market pay structures.

However, individual salaries are determined by a variety of factors including, but not limited to: business considerations, local market conditions, and internal equity, as well as candidate qualifications, such as skills, education, and experience.

Employee Benefits: At BAE Systems, we support our employees in all aspects of their life, including their health and financial well-being.

Regular employees scheduled to work 20 hours per week are offered: health, dental, and vision insurance; health savings accounts; a 401(k) savings plan; disability coverage; and life and accident insurance.

We also have an employee assistance program, a legal plan, and other perks including discounts on things like home, auto, and pet insurance.

Our leave programs include paid time off, paid holidays, as well as other types of leave, including paid parental, military, bereavement, and any applicable federal and state sick leave.

Employees may participate in the company recognition program to receive monetary or non-monetary recognition awards.

Other incentives may be available based on position level and/or job specifics.

**Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)**

**117193BR**

EEO Career Site Equal Opportunity Employer.

Minorities .

females .

veterans .

individuals with disabilities .

sexual orientation .

gender identity .

gender expression

Required Skill Profession

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