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Urgent! Senior Technical Leader, EPYC SOC Architecture Job Opening In Boxborough – Now Hiring AMD

Senior Technical Leader, EPYC SOC Architecture



Job description



WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems.

Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary.

When you join AMD, you'll discover the real differentiator is our culture.

We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.

Join us as we shape the future of AI and beyond.

Together, we advance your career.



THE ROLE:


As a senior technical leader in AMD's EPYC Datacenter SOC Architecture team, the EPYC Server SOC Architect will play a pivotal role in shaping the future of AMD's datacenter CPU roadmap.

This position offers a unique opportunity to combine system-level architectural innovation and SOC execution capability with strategic customer and business alignment to influence the direction of modern computing platforms at hyperscale.



You will also lead the detailed definition, specification, and delivery of advanced EPYC CPU and SOC capabilities—spanning compute, memory, IO, security, virtualization, and power optimization—while engaging directly with customers, ecosystem partners, and internal stakeholders.

Your work will help drive AMD's competitiveness across cloud, enterprise, AI/ML, and HPC markets.



THE PERSON:


You are a technical leader with a track record of delivering industry-defining architectures.

You thrive at the intersection of technology, business, and customer engagement, and excel at connecting long-term strategic thinking with real-world execution.

You understand not only how to build advanced CPUs, but why those features matter—to customers, to markets, and to the business.

You can lead and facilitate detailed technical definitions of capabilities by yourself and by other engineering and technical leaders across logical design, physical design, and design verification and validation.



You are naturally collaborative, deeply curious, and comfortable influencing across a matrixed organization.

You believe in leading through inclusion, mentorship, and partnership—and in bringing out the best in cross-functional teams.



KEY RESPONSIBILITIES:



  • Lead the architecture and delivery of EPYC CPUs or SOC-level capabilities from definition through high-volume production.

  • Act as a trusted technical partner to key customers, translating workload trends, deployment challenges, and operational priorities into actionable architectural strategies.

  • Drive long-range planning and alignment across business units for datacenter, AI training/inference, and HPC product lines.

  • Shape and assess platform-level trade-offs to improve Total Cost of Ownership (TCO) for EPYC-based solutions.

  • Represent AMD in strategic industry engagements, standards discussions, and high-value customer engagements as a thought leader.

  • Define and evangelize advanced features in memory architecture (DDR, LPDDR, CXL), on-chip coherence, chiplet integration, IO subsystems, and AI/ML-ready CPU design.

  • Collaborate deeply with internal teams—RTL, physical design, firmware/software, performance, and validation—to ensure feature definition and design closure, along with product competitiveness.

  • Own detailed feature specifications, overall program featureset closure and reconciliation across a matrixed organization of technical and product leads

  • Own one or more key architectural development areas as a subject matter expert

  • Champion a culture of technical excellence, inclusivity, and cross-functional transparency across global teams.



PREFERRED EXPERIENCE:



  • Demonstrated leadership in the architecture and delivery of high-performance CPUs or SOCs.

  • Deep technical expertise in one or more of the following: CPU microarchitecture, SOC system design and chiplet architecture, memory hierarchy, virtualization, interconnect, or power management.

  • Experience engaging directly with hyperscalers, OEMs, or other strategic partners on product planning or workload optimization.

  • Strong understanding of datacenter workload trends including cloud-native computing, AI/ML head-node requirements, and infrastructure scalability.

  • Ability to mentor, influence, and align diverse technical teams across geographies and domains.

  • Track record of thought leadership through publications, patents, or industry contributions is a plus.

  • Familiarity with AMD architecture and ecosystem a plus but not required.



ACADEMIC CREDENTIALS:


Master's or PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field is strongly preferred.

Equivalent industry experience with demonstrated impact will also be considered.



LOCATION:


Boxborough MA, Austin TX or other AMD North America locations.

Travel expected as needed for customer engagement and cross-site alignment.



#LI-DD3



Benefits offered are described: AMD benefits at a glance.



AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.


Required Skill Profession

Computer Occupations



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