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Urgent! SoC Physical Design Verification Engineer Job Opening In Beaverton – Now Hiring Apple
**Role Number:** 200623258-0505
**Summary**
At Apple, we work every single day to craft products that enrich people's lives! Do you love creating elegant solutions to highly complex challenges?
Do you intrinsically see the importance in every detail?
As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC).
You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions.
Joining our group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices.
Together, we will enable our customers to do all the things they love with their devices!
In this highly visible role, you will be part of a critical team responsible for physical verification of an SOC.
**Description**
As a member of our physical design team, you will perform various types of physical verification checks such as LVS, DRC, design-for-manufacturing, design-for-yield, and other lithography and electrical checks at the chip and block level.
Responsibilities expected will include:
- Driving full-chip physical verification flow methodology for Apple SoCs, starting from initial floorplanning phase through final tapeout.
- Setup and validation of PDV flows for block and full chip levels, including optimizations in partnership with cross functional groups such as Technology and CAD teams.
- Close collaboration with PNR, custom design, and IP teams to identify PDV issues starting from early milestones and drive solutions that optimize for PPA and efficient design closure.
- Driving full chip implementation and verification methodologies for ESD protection strategies including digital, analog and mixed signal back-end design verification.
- Serve as a technical expert and mentor within the organization, providing guidance on complex verification challenges and fostering the growth of early career engineers.
- Proactively identify and address execution risks, communicate status clearly to leadership, and drive issues to resolution with a high degree of autonomy.
- Cross functional collaboration with package, floorplan, and other analysis teams for padring, bump and RDL designs.
**Minimum Qualifications**
+ Minimum BS and 10+ years of relevant industry experience.
+ Proficient with industry-standard EDA tools such as Mentor Calibre, and/or Synopsys ICV.
+ Experience with scripting skills in Python, Tcl, and/or Perl, calibre-SVRF through deployed automation or verification flows.
**Preferred Qualifications**
+ Proven track record of taping out multiple complex SoCs in advanced tech-nodes.
+ Understanding of the device physics and how it applies to back-end verification challenges associated with advanced nodes, including complex design rules.
+ Experience in debugging and resolving highly complex LVS and DRC issues at the full-chip and block level.
+ Demonstrated ability to lead technical initiatives, mentor early career engineers, and drive methodologies from concept to production.
+ Experience with ESD protection strategies and digital, analog, and mixed signal design integration verification.
+ Experience with padring placement, Bump, RDL, and package design methodologies and verification checks.
+ Experience with industry-standard electrical analysis tools such as PERC, RedHawk, PathFinder, Totem, and/or Voltus used in ESD signoff checks.
+ Layout design experience.
Apple is an equal opportunity employer that is committed to inclusion and diversity.
We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .
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Unlock Your SoC Physical Potential: Insight & Career Growth Guide
Real-time SoC Physical Jobs Trends in Beaverton, United States (Graphical Representation)
Explore profound insights with Expertini's real-time, in-depth analysis, showcased through the graph below. This graph displays the job market trends for SoC Physical in Beaverton, United States using a bar chart to represent the number of jobs available and a trend line to illustrate the trend over time. Specifically, the graph shows 87878 jobs in United States and 173 jobs in Beaverton. This comprehensive analysis highlights market share and opportunities for professionals in SoC Physical roles. These dynamic trends provide a better understanding of the job market landscape in these regions.
Great news! Apple is currently hiring and seeking a SoC Physical Design Verification Engineer to join their team. Feel free to download the job details.
Wait no longer! Are you also interested in exploring similar jobs? Search now: SoC Physical Design Verification Engineer Jobs Beaverton.
An organization's rules and standards set how people should be treated in the office and how different situations should be handled. The work culture at Apple adheres to the cultural norms as outlined by Expertini.
The fundamental ethical values are:The average salary range for a SoC Physical Design Verification Engineer Jobs United States varies, but the pay scale is rated "Standard" in Beaverton. Salary levels may vary depending on your industry, experience, and skills. It's essential to research and negotiate effectively. We advise reading the full job specification before proceeding with the application to understand the salary package.
Key qualifications for SoC Physical Design Verification Engineer typically include Other General and a list of qualifications and expertise as mentioned in the job specification. Be sure to check the specific job listing for detailed requirements and qualifications.
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Here are some tips to help you prepare for and ace your job interview:
Before the Interview:To prepare for your SoC Physical Design Verification Engineer interview at Apple, research the company, understand the job requirements, and practice common interview questions.
Highlight your leadership skills, achievements, and strategic thinking abilities. Be prepared to discuss your experience with HR, including your approach to meeting targets as a team player. Additionally, review the Apple's products or services and be prepared to discuss how you can contribute to their success.
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